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The First International Conference on Advances in System Testing and Validation Lifecycle

VALID 2009

September 20-25, 2009 - Porto, Portugal


The papers listed below have been selected as "Best Papers" based on the reviews of the original submission, the camera-ready version, and the presentation during the conference.

A diploma will be issued in the name of the authors and mailed to the contact author.


Reusing Component Test Cases for Integration Testing of Retarding Embedded System Components
Abel Marrero PĂ©rez and Stefan Kaiser

Scenario-Based Test Case Generation Using Event-B Models
Qaisar Ahmad Malk, Johan Lilius, and Linas Laibinis

A High-Level Language and Compiler to Configure the Multi-core Debug Solution (MCDS)
Jens Braunes and Rainer G. Spallek

Integration Test Order Strategies to Consider Test Focus and Simulation Effort
Lars Borner and Barbara Paech

Using the Testability Analysis Methodology for the Validation of AIRBUS Systems
Fassely Doumbia, Odile Laurent, Chantal Robach, and Michel Delaunay

FPGA-Accelerated Baseband Design and Verification of Broadband MIMO Wireless Systems
Amirhossein Alimohammad, Saeed Fouladi Fard, and Bruce F. Cockburn

Using TMR Architectures for SoC Yield Improvement
J. Vial, A. Virazel, A. Bosio, L. Dilillo, P. Girard, C. Landrault, and S. Pravossoudovitch


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